For high-quality digital systems, scan alone is insufficient. You need a holistic DFT architecture.
1. Introduction: The Quality-Cost Tradeoff For high-quality digital systems, scan alone is insufficient
The transition fault model captures timing-related defects where signals fail to change state within required time constraints. The path delay fault model addresses cumulative delays along critical timing paths. The bridging fault model handles short circuits between adjacent conductors. The open fault model addresses broken connections. A high-quality test solution must address all relevant fault models for the target technology. For high-quality digital systems